With a semiconductor device in which a plurality of types of signal circuits, including a digital signal circuit, an analog signal circuit and a high-frequency signal circuit, are integrated together within a single IC chip, such as a system-on-chip (SOC), the device characteristics deteriorate due to interactions between these circuit blocks and interactions between these circuit blocks and the input (or output) electrode pad. Among others, a particularly significant problem is the deterioration of device characteristics due to switching noise from a digital switch circuit (“switching noise” refers to high-frequency noise generated by the switching of an electronic circuit) propagating to the electrode pad via a semiconductor substrate made of silicon.
As an example, in a case of a semiconductor device including an attenuation circuit connected downstream of a digital switch circuit and an output electrode pad connected downstream of the attenuation circuit, switching noise from the digital switch circuit propagates to the output electrode pad via a semiconductor substrate included in the semiconductor device, thereby lowering the quality of the signal output from the output electrode pad (detracting from the amount of attenuation obtained by the attenuation circuit).
Moreover, in recent years, as semiconductor devices are miniaturized, the distance between an electrode pad and a device under the electrode pad is shortened, thereby increasing the parasitic capacitance between the electrode pad and the device under the electrode pad, and increasing the amount of noise propagation to the electrode pad via the semiconductor substrate.
A technique as follows (see, for example, Patent Document 1) has been proposed as a measure for suppressing the propagation of noise to the electrode pad via the semiconductor substrate. The configuration of a conventional semiconductor device will be described with reference to FIGS. 12(a) and 12(b). FIGS. 12(a) and 12(b) show the configuration of the conventional semiconductor device, and specifically, FIG. 12(a) is a plan view, and FIG. 12(b) is a cross-sectional view taken along line XII-XII shown in FIG. 12(a).
As shown in FIGS. 12(a) and 12(b), an electrode pad 806 is formed in an area on an insulating film 805 on a semiconductor substrate 801 where there is no device (not shown). A metal layer (or silicide layer) 815 having about the same area as that of the electrode pad 806 is formed in the insulating film 805 under the electrode pad 806. The metal layer (or silicide layer) 815 is electrically connected to a wire 808, which is fixed to a constant potential. With the conventional semiconductor device, the metal layer (or silicide layer) 815 is kept at a constant potential during operation in an attempt to suppress the propagation of noise to the electrode pad 806 via the semiconductor substrate 801.
Patent Document 1: Japanese Published Patent Application No. 2000-299319